New Open Virtual Platforms Processor Models for ARM, Imagination Technologies, RISC-V and Renesas Accelerate Software Development

Latest OVP Models and Virtual Prototype Software Release with iGen, Available Now

Oxford, United Kingdom, May 23, 2017 – Imperas Software Ltd., the leader in high-performance software simulation, today announced the availability of new Open Virtual Platforms (OVP) models for ARM, Imagination Technologies, RISC-V and Renesas processors, along with a new OVPsim software release including the iGen modeling tool.

For embedded software and hardware developers, virtual platforms are increasingly important, especially for multi-core designs. These new OVP library models, for ARM’s ARMv8.1 architecture for the Cortex-A family, Imagination Technologies MIPS I6400, Renesas RH850, and RISC-V, extend Imperas’ leadership in virtual prototyping. OVP models, APIs and the OVPsim virtual platform simulator support development and customization of instruction-accurate platforms for SoCs and larger systems for software development, debug and test.

The Open Virtual Platforms (OVP) portal delivers free, open source models for virtual platforms, as well as OVPsim simulation, and now iGen modeling software. The resources on this portal can significantly accelerate development and test for the embedded software world. New in this OVPsim release is also the iGen productivity tool for peripheral and platform building. All of these processor models are available now.

Rick O’Connor, Executive Director, RISC-V Foundation commented: “Imperas, a member of the RISC-V Foundation, has developed and released open source models of the RISC-V RV32I and RV64I cores through the Open Virtual Platformsä (OVPä) website. These virtual platforms and models enable early software development, long before hardware is available, help lower software development costs, increase quality, improve time to market, and reduce software development risks.”

Fast Processor Models are available as well for the Renesas RH850 microcontroller (MCU) family, commonly used for automotive applications such as power train, braking system and body control. This expands Renesas model support, including previously-released Renesas processor families such as the V850, RL78 and M16C. A video demonstration of OVP Fast Processor models for the Renesas RH8503GM processor and OVPsim, with the Green Hills Software MULTI debugger, is available here.

“Imperas and OVP are proud to provide these new models, along with virtual platforms for embedded software and hardware development,” said Simon Davidmann, president and CEO of Imperas. “And, our new iGen solution significantly accelerates custom model and virtual platform development.”

Imperas virtual prototyping solutions support a wide variety of OVP models and virtual prototypes, including processor models of Altera, ARM (including Cortex-A, R and M families), Imagination Technologies (MIPS), PowerPC, Renesas, RISC-V, Synopsys (ARC) and Xilinx cores. The addition of these new models expands existing Imperas and Open Virtual Platforms (OVP) platform support to over 170 processor models across a wide variety of vendors. For the latest list of Imperas models, please see the OVP website models page.  And follow Imperas on Linked In and twitter @ImperasSoftware.

About Imperas

For more information about Open Virtual Platforms and Imperas, please see www.ovpworld.org and www.imperas.com.

Imperas Virtual Platform Based Software Tools at DAC 2017

Virtual Prototyping in Demonstrations of Software Development Using Continuous Integration and Jenkins, Debug and Test, and a Tutorial on Linux Bring Up on Heterogeneous Multiprocessor SoCs

Oxford, United Kingdom, May 22, 2017 – Imperas Software Ltd., the leader in high-performance software simulation, today announced their participation at the Design Automation Conference (DAC) 2017, inviting developers of electronic products to register for a demonstration of Imperas virtual platforms for embedded software and systems development, debug and test at the Imperas booth in the World of IoT pavilion, booth #521.

DEMO HIGHLIGHTS: See Imperas virtual platform-based solutions for embedded software development, debug, analysis, and verification demos in the World of IoT pavilion, booth #521.

  • Imperas demos will show a wide variety of Open Virtual Platforms (OVP) models and virtual prototypes, with processor models of ARM (Cortex-A, M and R families), Altera, ARC, Imagination Technologies (MIPS), Renesas, RISC-V and Xilinx cores.
  • These demos will showcase the Imperas software Verification, Analysis and Profiling (VAP) tools, including OS-aware tools, plus heterogeneous multiprocessor/multicore debugging capabilities.
  • Imperas will show virtual platforms in a Continuous Integration / Continuous Test embedded software development environment using Jenkins, resulting in an efficient methodology to develop high-quality software.

TUTORIAL: Linux Bring Up on Heterogeneous Multiprocessor SoCs

  • Heterogeneous multiprocessor SoCs are common in applications such as advanced driver assistance systems (ADAS) and autonomous vehicles, networking, industrial automation, security, video analytics and machine learning.  These SoCs often have multiple homogeneous or heterogeneous clusters of CPUs, GPUs, and/or hardware accelerator units that work together on a common set of data. Linux, the general purpose operating system of choice for embedded systems, must be modified for these heterogeneous multi-cluster architectures to support coherence between clusters, as well as differences such as number of processors, processor type, and other features. Vendors often use an open source Linux distribution, then customize for the specific SoC, including drivers for the peripherals, other customizations and unique features.  Obviously, this gets quite complex, and the need to port, customize and bring up Linux on these heterogeneous SoCs requires significant engineering effort.  So how can developers be more efficient?  What are the best practices for Linux porting and bring up on heterogeneous multi-cluster/multiprocessor SoCs?
  • John Min, Solution Engineer at Imagination Technologies, covers components of the basic Linux kernel, device trees and other customizations, SMP variations, static and dynamic drivers, and coherency for multi-cluster architectures.  The methodology used for bring up of the Linux kernel, starting with boot loaders including U-boot, on hardware is presented.
  • Simon Davidmann, CEO of Imperas Software, discusses a robust debug and test environment based on virtual platform technology.  Virtual platforms provide a complementary approach to porting and bring-up on hardware, with benefits of controllability, observability and repeatability. Virtual platforms also enable easy automation of testing, as needed for an Agile Continuous Integration (CI) development and test methodology.  Specific OS-aware tools are also highlighted, plus non-intrusive memory monitors, the use of software assertions, and code and functional coverage techniques for operating systems and drivers.

WHEN AND WHERE: DAC 2017 is June 18-22 at the Austin Convention Center, Austin, Texas.

  • Exhibits are open June 19-21.
  • Imperas tutorial is Monday, June 19 from 10:30am- 12:00pm in room 17AB.

For more information, or to set up meetings with Imperas at DAC, please email sales@imperas.com

About Imperas

For more information about Imperas, please see http://www.imperas.com.

LibrePlanet

by Eric Schultz, Community Manager

I was recently asked to speak at LibrePlanet about my experiences working with the FCC on WiFi radio regulations. I was delighted to speak on the topic and prpl Foundation was gracious enough to send me.

Eric at LibrePlanetFor those who aren’t aware, LibrePlanet is the Free Software Foundation’s yearly celebration of free and open source software. LibrePlanet is a unique conference in that it mixes socially conscious technology users and creators with leaders in the free and open source software space. Attending LibrePlanet works best when you spend most of your time listening, and that’s exactly what I did. It’s fascinating to see how a diverse set of people look at social problems and see how open source software can be used to address those problems. While there I did find time to share some of the interesting work that prpl Foundation is doing; there’s a lot of interest among many parties about how prpl’s work on an open source secure boot and OpenWrt/LEDE could be used by individuals and smaller manufacturers. Continue reading

EEMBC and prpl align to drive use of hypervisors to create security-by-separation for a more trusted IoT

Collaboration to assess performance overhead of virtualization technologies in embedded devices

SANTA CLARA, CALIF – April 4, 2017 – Today the prpl Foundation and EEMBC announced a formal partnership to advance the use of security-by-separation in Internet of Things (IoT) edge devices. By developing an industry-standard hypervisor benchmark, the collaboration aims to shatter the perception that the use of hardware virtualization in low-power embedded devices comes with big performance and energy overheads.

prpl is a community driven, non-profit organization with a focus on enabling the security and interoperability of embedded devices for the IoT and smart society of the future. EEMBC is an industry alliance that develops benchmarks to help system designers select the optimal processors and understand the performance and energy characteristics of their systems. The partnership will see EEMBC’s Markus Levy alongside Art Swift, president of prpl Foundation, co-chair the joint EEMBC/prpl HyperBench Working Group. The aim of the group will be to assess the performance of new lightweight embedded hypervisors paired with System on Chips (SoCs) with hardware support for virtualization.

Hardware virtualization technology coupled with hypervisors can provide improved security through isolation or ‘separation’ of users, tenants, and applications running on a given device. This approach is well understood and widely used in the datacenter, but not traditionally in deeply embedded, resource-constrained systems such as those in the IoT – primarily due to perceptions of performance limitations or associated ‘overhead’. EEMBC and prpl hope to demonstrate that any such limitations are mitigated through new developments and techniques.

The way software or firmware gets assembled today the maker of the device often has little control over all of the components as a whole. By using hypervisors at the hardware level to create security through separation, supply chain security issues could be greatly reduced while preserving the core functionality of the device – even if a security issue arises with another component of the system or it is compromised by malware such as Mirai.

“EEMBC sees value in HyperBench in two ways. The first way follows our traditional model of creating benchmarks to help system developers select the most optimal processing solution for their applications; in this case, HyperBench will allow processor vendors to fairly demonstrate their performance advantages,” said Markus Levy, EEMBC president. “In the second way, HyperBench will help out the industry in general by demonstrating that with advanced hardware assist for virtualization, the performance impact of hypervisors will be minimal.”

prpl and EEMBC members have considerable expertise in virtualization and hypervisor technologies. prpl has based its peer-reviewed Security Framework in large part on this approach, and many of its members are well-versed in deployment of the technology. EEMBC and its members have previously spent considerable time and energy on assessing how the performance overhead of virtualization technologies can be tested or benchmarked. Together the joint working group will create an architecture and operating system neutral benchmark tool to support vendors of processors, hypervisors, and operating systems, as well as their customers – the IoT system designers.

“Security of IoT is not a problem that any one company or entity can solve on its own,” said Art Swift, president of the prpl Foundation. “It will take cooperation at all levels to work towards best practices and developing universal standards. At prpl we are delighted to collaborate with EEMBC to show how a separation-based approach rooted in hardware can create a more secure IoT without significant performance penalties.”

Initial members from prpl of the new benchmarking working group also include Kernkonzept and Imagination Technologies.

About EEMBC

EEMBC is an industry alliance that develops benchmarks to help system designers select the optimal processors and understand the performance and energy characteristics of their systems. EEMBC has benchmark suites targeting cloud and big data, mobile devices (for phones and tablets), networking, ultra-low power microcontrollers, the Internet of Things (IoT), digital media, automotive, and other application areas. EEMBC also has benchmarks for general-purpose performance analysis including CoreMark, MultiBench (multicore), and FPMark (floating-point).  For more information about EEMBC, please visit: http://eembc.org

About prpl Foundation

prpl (pronounced “Purple”) is a community driven, non-profit organization with a focus on enabling the security and interoperability of embedded devices for the IoT and smart society of the future. prpl represents leaders in the technology industry investing in innovation in efficiency, portability and compatibility for the good of a broad community of developers, businesses and consumers. For more information about the prpl Foundation, please visit: http://prpl.works.

Embedded World 2017 – IoT coming of age.

by Cesare Garlati – Chief Security Strategist, prpl Foundation

Last week I had the pleasure of attending Embedded World 2017 in Germany as I was invited to give a couple of presentations on the pioneering work we have been doing at the prpl Foundation with regards to the prplHypervisor™ and prplPUF™ APIs for securing IoT. As it turns out, IoT was the top line at the conference that drew in more than 30,000 trade visitors – and the event solidified the notion that embedded computing is now synonymous with IoT.

IoT Security: Pushing the boundaries of resource constrained devices

The main theme running throughout was the challenge of pushing resource constrained devices to the limits. From a tech provider’s perspective, this was the most pervasive, well-defined issue being tackled at the show – how do we push the capabilities when it comes to functionality and security in low power devices with limited memory and minimal CPU resources?

With IoT, applying security technology after the fact or using encryption as used in a traditional security model is simply not an option in devices that don’t have the battery power, memory or CPU to support such measures, much less being able to afford the expense when the device itself costs so little. Yet, the fact that these are physical devices makes them so much more dangerous to human life and therefore the security should be taken just as seriously as that of a data centre.

Open Source as (one) answer

The answer for much of these basic security questions meant that more and more vendors are adopting – or seriously considering – the use of open source software. Though not everyone was aligned with the true value of open source, some even felt opportunistic, it was encouraging that the message of using open source, with all the extra eyes on it, is getting through.

Having said that, and knowing that open source software is notoriously more resilient than proprietary, closed source software – it does have its issues that vendors and manufacturers need to be aware of. Namely, though it is open and freely available, open source is not free. Yes, there is no licensing fee, but that is not to say it doesn’t come with the expenses of developing expertise, ensuring the organisation using it has the right liability cover, maintenance and working with open source communities to get the best out of it. As with anything in life, using open source requires upkeep to get the most from it.

In silicon we trust

Using open source protocols to get the basics right in IoT means that embedded devices can truly be interoperable with each other. What stops this from being a security risk is trust. The other element I discussed and which received over an hour of questions from the audience was the prplPUF™ API, the Physical Unclonable Funtions implementation of the prplSecurity™framework. I think everyone can agree that we’ve established that embedding secrets in a device is just not a good idea – and if you need proof, look no further than the Vault 7 revelations; not even the CIA can hide such secrets. Instead, what if you could extract a unique identifier from the silicon itself, something that is exclusive and repeatable and unable to be cloned?

This could have all sorts of applications for improving and strengthening security in embedded devices and the real genius of it is that it’s something that already exists with in the hardware itself – much like a digital fingerprint.

By using the prpl platform which combines open source with the use of a light-weight hypervisor for security by separation and PUF to establish trust in embedded systems, we’re looking at a much safer future for IoT.

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For more information or to get involved in the groundbreaking work prpl is doing with improving embedded computing security, visit us at http://prpl.works or contact me directly at @CesareGarlati

Prpl Foundation tackles how to secure the Internet of Things at Embedded World 2017

Not for profit and its members showcase innovation and push the limits of embedded computing

Santa Clara, Calif. – 9 March 2017 – At Embedded World in Nuremburg, 14-16 March 2017, prpl Foundation and several of its member companies will address of the security concerns presented by embedded computing systems as they become more intertwined in our lives.

During two separate presentations on March 14 at the show, prpl’s chief security strategist, Cesare Garlati, will outline and demonstrate how a new separation-based approach anchored in hardware can create the trust needed across the IoT from node to cloud. How We Can Fix Embedded Computing Through an Open Source, Silicon-Layer Approach will take place at 9:30-10:00 and the Interactive Session: How a New Hardware-Based Approach Can Fix Critical Areas of Embedded Computing Security will take place at 14:30 – 15:00.

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